Schedule

Two lectures a week on Tuesday and Thursday at 9:30am to 11:00am.

One recitation a week on Friday at 3:30pm to 4:30pm.

Office Hours

Please check the Google Calendar (preview) for the most up-to-date office hour times and locations.

Generally, OH will be:

- Monday 3pm - 4:30pm (Austin and Jianming)
- Tuesday 3pm - 4:30pm (Sanjay and Austin)
- Wednesday 2pm - 3:30pm (Martin and Jianming)
- Friday 2pm - 3:30pm (Martin and Sanjay)

We can also move or schedule more OH by appointment.

Labs

Most of the assignments are labs. We will generally start assigning parts of a lab the day the topic is introduced, and have the lab be due one week after the topic is finished. We may move due dates if a lab is unexpectedly difficult. :)

Some labs are in two parts:

- The first part is generally meant to be a warm-up and is usually graded for completion, 0 or 1 points. We will try to make sure the first part is not overwhelming, but rather helpful for doing the main part.
- The main part is graded from 0 to 2 points. 0 points will be awarded if nothing is turned in, 1 point will be awarded if instructors deem that the student has partial understanding of the lab material, and 2 points will be awarded for a working lab.

Grades are issued at checkoffs, which will be about 5 minutes during office hours. Students will have a few days after each lab due date to do the checkoff if they hadn't already. We will have sign-up sheets to book a checkoff slot.

Final Project

The final project will be to show and experiment with a cool architectural idea. It can be an extension from a lab we did in class or something original (with staff approval). It can be fairly open-ended. We will release more details closer to the date.

We plan to release the project handout in mid-April. We will also stop lectures around mid-late April, leaving about 3 weeks of the semester for regular final project meetings and check-ins with course staff.

The project will have several checkpoints to help you space out the work. A final report and presentation will be due in the last week of class.

Grading

Grade depends on Labs (70%) + Project (30%)

- A = >75%
- B = <75%
- C = <50%

A bonus 5% may be awarded for students who participate in lecture/on Piazza.

Late Policy

Every day following the due date of the lab, late work will be worth 10% points less. This is the only case in which students will receive a non-integer amount of points.

Staff

Instructors:
Arvind: arvind@csail.mit.edu
Tushar Krishna: tushar@csail.mit.edu
Thomas Bourgeat: thomas.bourgeat@epfl.ch

TAs:
Martin Chan: martinch@mit.edu
Jianming Tong: jianming@csail.mit.edu
Sanjay Seshan: seshan@mit.edu
Austin White: akwb@mit.edu

Admin:
Sally Lee sally@csail.mit.edu

Staff email: 6.192-staff@MIT.EDU

Please contact staff and TAs with any logistics questions.

For extenuating circumstances please contact course staff at 6.192-staff@mit.edu

Tentative Schedule

This schedule is subject to change. We may move around labs if we move around the corresponding lectures.

The class can be thought of informally as 4 chunks:

- Introduction to Bluespec
- Processors and Caches Review
- Multiprocessors and Network-on-Chip
- Survey of Processor Optimizations

For lectures:

• L01: Intro + Combinational Review [Lab 0 released]
  - L02: Sequential Review + Modules and Guards [Lab 1a released]
  - L03: Multirule Systems and Scheduling [Lab 1b released]
  - L04: Scheduling Constraints
  - (Presidents' Day)
  - L05: Processors I [Lab1 due, Lab 2a released] (Sanjay)
  - L06: Processors II [Lab 2b released; due one week after] (Sanjay)
  - L07: Caches [(TBD) Lab 3 released] (Thomas)
  - L08: Branch Prediction (Thomas)
  - L09: Superscalar (Martin)
  - L10: Multithreading/Simultaneous Multithreading (Thomas, virtual) [(TBD) Lab 4 released]
  - L11: Programming SMT (Thomas, virtual)
  - L12: Multiprocessors and Sequential Consistency (Tushar)
  - L13: Cache Coherence (Tushar)
  - (Spring Break x2)
  - Vector Machines [TBD, start project, maybe sooner depending on pace?]
  - Connecting Accelerators
  - Network-on-Chip I (Tushar) [(TBD) Lab 5 released]
  - Network-on-Chip II (Jianming)
  - Project Proposals
  - (😶Surprise😶)
  - [about 5 or 6 "empty" slots]
  - Final Presentations